Design Name | first_project_top |
Fitting Status | Successful |
Software Version | O.61xd |
Device Used | XC95288XL-10-TQ144 |
Date | 1-12-2013, 9:11PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
37/288 (13%) | 101/1440 (8%) | 36/288 (13%) | 6/117 (6%) | 65/864 (8%) |
|
|
Signal mapped onto global clock net (GCK1) | clk |
Signal mapped onto global clock net (GCK2) | clk_spi |
Macrocells in high performance mode (MCHP) | 37 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 37 |